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CPU/NewRec: Don't panic on unused opcodes

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Stenzek 2024-02-23 11:37:11 +09:00
parent 75cd2dac0d
commit 175d2a17f7
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2 changed files with 21 additions and 5 deletions
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25
src/core/cpu_newrec_compiler.cpp
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@ -1240,8 +1240,7 @@ void CPU::NewRec::Compiler::CompileInstruction()
case InstructionFunct::nor: CompileTemplate(&Compiler::Compile_nor_const, &Compiler::Compile_nor, PGXPFN(CPU_NOR), TF_WRITES_D | TF_READS_S | TF_READS_T | TF_COMMUTATIVE); SpecExec_nor(); break; case InstructionFunct::nor: CompileTemplate(&Compiler::Compile_nor_const, &Compiler::Compile_nor, PGXPFN(CPU_NOR), TF_WRITES_D | TF_READS_S | TF_READS_T | TF_COMMUTATIVE); SpecExec_nor(); break;
case InstructionFunct::slt: CompileTemplate(&Compiler::Compile_slt_const, &Compiler::Compile_slt, PGXPFN(CPU_SLT), TF_WRITES_D | TF_READS_T | TF_READS_S); SpecExec_slt(); break; case InstructionFunct::slt: CompileTemplate(&Compiler::Compile_slt_const, &Compiler::Compile_slt, PGXPFN(CPU_SLT), TF_WRITES_D | TF_READS_T | TF_READS_S); SpecExec_slt(); break;
case InstructionFunct::sltu: CompileTemplate(&Compiler::Compile_sltu_const, &Compiler::Compile_sltu, PGXPFN(CPU_SLTU), TF_WRITES_D | TF_READS_T | TF_READS_S); SpecExec_sltu(); break; case InstructionFunct::sltu: CompileTemplate(&Compiler::Compile_sltu_const, &Compiler::Compile_sltu, PGXPFN(CPU_SLTU), TF_WRITES_D | TF_READS_T | TF_READS_S); SpecExec_sltu(); break;
default: Compile_Fallback(); InvalidateSpeculativeValues(); TruncateBlock(); break;
default: Panic("fixme funct"); break;
} }
} }
break; break;
@ -1323,7 +1322,18 @@ void CPU::NewRec::Compiler::CompileInstruction()
case InstructionOp::lwc2: CompileLoadStoreTemplate(&Compiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_GTE_STALL | TF_READS_S | TF_LOAD_DELAY); break; case InstructionOp::lwc2: CompileLoadStoreTemplate(&Compiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_GTE_STALL | TF_READS_S | TF_LOAD_DELAY); break;
case InstructionOp::swc2: CompileLoadStoreTemplate(&Compiler::Compile_swc2, MemoryAccessSize::Word, true, false, TF_GTE_STALL | TF_READS_S); SpecExec_swc2(); break; case InstructionOp::swc2: CompileLoadStoreTemplate(&Compiler::Compile_swc2, MemoryAccessSize::Word, true, false, TF_GTE_STALL | TF_READS_S); SpecExec_swc2(); break;
default: Panic("Fixme"); break; // swc0/lwc0/cop1/cop3 are essentially no-ops
case InstructionOp::cop1:
case InstructionOp::cop3:
case InstructionOp::lwc0:
case InstructionOp::lwc1:
case InstructionOp::lwc3:
case InstructionOp::swc0:
case InstructionOp::swc1:
case InstructionOp::swc3:
break;
default: Compile_Fallback(); InvalidateSpeculativeValues(); TruncateBlock(); break;
// clang-format on // clang-format on
#undef PGXPFN #undef PGXPFN
@ -1696,11 +1706,16 @@ void CPU::NewRec::Compiler::CompileLoadStoreTemplate(void (Compiler::*func)(Comp
Log_WarningFmt("Instruction {:08X} speculatively writes to {:08X} inside block {:08X}-{:08X}. Truncating block.", Log_WarningFmt("Instruction {:08X} speculatively writes to {:08X} inside block {:08X}-{:08X}. Truncating block.",
m_current_instruction_pc, phys_spec_addr, m_block->pc, m_current_instruction_pc, phys_spec_addr, m_block->pc,
m_block->pc + (m_block->size * sizeof(Instruction))); m_block->pc + (m_block->size * sizeof(Instruction)));
TruncateBlock();
}
}
}
void CPU::NewRec::Compiler::TruncateBlock()
{
m_block->size = ((m_current_instruction_pc - m_block->pc) / sizeof(Instruction)) + 1; m_block->size = ((m_current_instruction_pc - m_block->pc) / sizeof(Instruction)) + 1;
iinfo->is_last_instruction = true; iinfo->is_last_instruction = true;
} }
}
}
void CPU::NewRec::Compiler::FlushForLoadStore(const std::optional<VirtualMemoryAddress>& address, bool store, void CPU::NewRec::Compiler::FlushForLoadStore(const std::optional<VirtualMemoryAddress>& address, bool store,
bool use_fastmem) bool use_fastmem)

1
src/core/cpu_newrec_compiler.h
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@ -199,6 +199,7 @@ protected:
u32 GetBranchReturnAddress(CompileFlags cf) const; u32 GetBranchReturnAddress(CompileFlags cf) const;
bool TrySwapDelaySlot(Reg rs = Reg::zero, Reg rt = Reg::zero, Reg rd = Reg::zero); bool TrySwapDelaySlot(Reg rs = Reg::zero, Reg rt = Reg::zero, Reg rd = Reg::zero);
void SetCompilerPC(u32 newpc); void SetCompilerPC(u32 newpc);
void TruncateBlock();
virtual const void* GetCurrentCodePointer() = 0; virtual const void* GetCurrentCodePointer() = 0;