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GTE: GPL instruction passing tests

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This commit is contained in:
Connor McLaughlin 2019-09-28 15:25:07 +10:00
parent 8841934009
commit 1a30815109
1 changed files with 11 additions and 14 deletions
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25
src/pse/gte.cpp
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@ -830,32 +830,29 @@ void Core::Execute_DPCL(Instruction inst)
m_regs.FLAG.UpdateError(); m_regs.FLAG.UpdateError();
} }
static s32 s_count = 0;
void Core::Execute_GPL(Instruction inst) void Core::Execute_GPL(Instruction inst)
{ {
s_count++;
if (s_count == 4)
__debugbreak();
m_regs.FLAG.Clear(); m_regs.FLAG.Clear();
const u8 shift = inst.GetShift(); const u8 shift = inst.GetShift();
const bool lm = inst.lm; const bool lm = inst.lm;
// [MAC1,MAC2,MAC3] = [MAC1,MAC2,MAC3] SHL (sf*12) ;<--- for GPL only // [MAC1,MAC2,MAC3] = [MAC1,MAC2,MAC3] SHL (sf*12) ;<--- for GPL only
if (inst.sf)
{
TruncateAndSetMAC<1>(s64(m_regs.MAC1), shift);
TruncateAndSetMAC<2>(s64(m_regs.MAC2), shift);
TruncateAndSetMAC<3>(s64(m_regs.MAC3), shift);
}
// [MAC1,MAC2,MAC3] = (([IR1,IR2,IR3] * IR0) + [MAC1,MAC2,MAC3]) SAR (sf*12) // [MAC1,MAC2,MAC3] = (([IR1,IR2,IR3] * IR0) + [MAC1,MAC2,MAC3]) SAR (sf*12)
TruncateAndSetMAC<1>((s64(s32(m_regs.IR1) * s32(m_regs.IR0)) + s64(m_regs.MAC1)) >> shift, 0); TruncateAndSetMACAndIR<1>((s64(s32(m_regs.IR1) * s32(m_regs.IR0)) + (s64(m_regs.MAC1) << shift)), shift, lm);
TruncateAndSetMAC<2>((s64(s32(m_regs.IR2) * s32(m_regs.IR0)) + s64(m_regs.MAC2)) >> shift, 0); TruncateAndSetMACAndIR<2>((s64(s32(m_regs.IR2) * s32(m_regs.IR0)) + (s64(m_regs.MAC2) << shift)), shift, lm);
TruncateAndSetMAC<3>((s64(s32(m_regs.IR3) * s32(m_regs.IR0)) + s64(m_regs.MAC3)) >> shift, 0); TruncateAndSetMACAndIR<3>((s64(s32(m_regs.IR3) * s32(m_regs.IR0)) + (s64(m_regs.MAC3) << shift)), shift, lm);
// Color FIFO = [MAC1/16,MAC2/16,MAC3/16,CODE], [IR1,IR2,IR3] = [MAC1,MAC2,MAC3] // Color FIFO = [MAC1/16,MAC2/16,MAC3/16,CODE], [IR1,IR2,IR3] = [MAC1,MAC2,MAC3]
PushRGB(TruncateRGB<0>(m_regs.MAC1 / 16), TruncateRGB<1>(m_regs.MAC2 / 16), TruncateRGB<2>(m_regs.MAC3 / 16), // Note: SHR 4 used instead of /16 as the results are different.
PushRGB(TruncateRGB<0>(m_regs.MAC1 >> 4), TruncateRGB<1>(m_regs.MAC2 >> 4), TruncateRGB<2>(m_regs.MAC3 >> 4),
m_regs.RGBC[3]); m_regs.RGBC[3]);
TruncateAndSetIR<1>(m_regs.MAC1, lm);
TruncateAndSetIR<2>(m_regs.MAC2, lm);
TruncateAndSetIR<3>(m_regs.MAC3, lm);
m_regs.FLAG.UpdateError(); m_regs.FLAG.UpdateError();
} }