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GPU: Set display parameters even when disabled

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This commit is contained in:
Connor McLaughlin 2021-08-24 11:57:14 +10:00
parent 461e6aa50b
commit 1e88d04430
5 changed files with 25 additions and 25 deletions
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10
src/core/gpu_hw_d3d11.cpp
View File

@ -857,6 +857,11 @@ void GPU_HW_D3D11::UpdateDisplay()
} }
else else
{ {
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale; const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale;
const u32 vram_offset_x = m_crtc_state.display_vram_left; const u32 vram_offset_x = m_crtc_state.display_vram_left;
const u32 vram_offset_y = m_crtc_state.display_vram_top; const u32 vram_offset_y = m_crtc_state.display_vram_top;
@ -923,11 +928,6 @@ void GPU_HW_D3D11::UpdateDisplay()
RestoreGraphicsAPIState(); RestoreGraphicsAPIState();
} }
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
} }
} }

10
src/core/gpu_hw_d3d12.cpp
View File

@ -885,6 +885,11 @@ void GPU_HW_D3D12::UpdateDisplay()
} }
else else
{ {
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale; const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale;
const u32 vram_offset_x = m_crtc_state.display_vram_left; const u32 vram_offset_x = m_crtc_state.display_vram_left;
const u32 vram_offset_y = m_crtc_state.display_vram_top; const u32 vram_offset_y = m_crtc_state.display_vram_top;
@ -939,11 +944,6 @@ void GPU_HW_D3D12::UpdateDisplay()
RestoreGraphicsAPIState(); RestoreGraphicsAPIState();
} }
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
} }
} }

10
src/core/gpu_hw_opengl.cpp
View File

@ -882,6 +882,11 @@ void GPU_HW_OpenGL::UpdateDisplay()
} }
else else
{ {
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale; const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale;
const u32 vram_offset_x = m_crtc_state.display_vram_left; const u32 vram_offset_x = m_crtc_state.display_vram_left;
const u32 vram_offset_y = m_crtc_state.display_vram_top; const u32 vram_offset_y = m_crtc_state.display_vram_top;
@ -971,11 +976,6 @@ void GPU_HW_OpenGL::UpdateDisplay()
SetBlendMode(); SetBlendMode();
SetDepthFunc(); SetDepthFunc();
} }
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
} }
} }

10
src/core/gpu_hw_vulkan.cpp
View File

@ -1450,6 +1450,11 @@ void GPU_HW_Vulkan::UpdateDisplay()
} }
else else
{ {
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale; const u32 resolution_scale = m_GPUSTAT.display_area_color_depth_24 ? 1 : m_resolution_scale;
const u32 vram_offset_x = m_crtc_state.display_vram_left; const u32 vram_offset_x = m_crtc_state.display_vram_left;
const u32 vram_offset_y = m_crtc_state.display_vram_top; const u32 vram_offset_y = m_crtc_state.display_vram_top;
@ -1529,11 +1534,6 @@ void GPU_HW_Vulkan::UpdateDisplay()
RestoreGraphicsAPIState(); RestoreGraphicsAPIState();
} }
} }
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
} }
} }

10
src/core/gpu_sw.cpp
View File

@ -486,17 +486,17 @@ void GPU_SW::UpdateDisplay()
if (!g_settings.debugging.show_vram) if (!g_settings.debugging.show_vram)
{ {
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
if (IsDisplayDisabled()) if (IsDisplayDisabled())
{ {
m_host_display->ClearDisplayTexture(); m_host_display->ClearDisplayTexture();
return; return;
} }
m_host_display->SetDisplayParameters(m_crtc_state.display_width, m_crtc_state.display_height,
m_crtc_state.display_origin_left, m_crtc_state.display_origin_top,
m_crtc_state.display_vram_width, m_crtc_state.display_vram_height,
GetDisplayAspectRatio());
const u32 vram_offset_y = m_crtc_state.display_vram_top; const u32 vram_offset_y = m_crtc_state.display_vram_top;
const u32 display_width = m_crtc_state.display_vram_width; const u32 display_width = m_crtc_state.display_vram_width;
const u32 display_height = m_crtc_state.display_vram_height; const u32 display_height = m_crtc_state.display_vram_height;