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Add interrupt controller emulation
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@ -5,8 +5,15 @@
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#include <array>
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class StateWrapper;
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namespace CPU
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{
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class Core;
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}
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class DMA;
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class GPU;
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class InterruptController;
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class System;
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class Bus
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@ -15,7 +22,7 @@ public:
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Bus();
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~Bus();
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bool Initialize(System* system, DMA* dma, GPU* gpu);
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bool Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu);
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void Reset();
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bool DoState(StateWrapper& sw);
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@ -32,12 +39,15 @@ public:
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void PatchBIOS(u32 address, u32 value, u32 mask = UINT32_C(0xFFFFFFFF));
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private:
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static constexpr u32 DMA_BASE = 0x1F801080;
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static constexpr u32 DMA_SIZE = 0x80;
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static constexpr u32 DMA_MASK = DMA_SIZE - 1;
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static constexpr u32 GPU_BASE = 0x1F801810;
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static constexpr u32 GPU_SIZE = 0x10;
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static constexpr u32 GPU_MASK = GPU_SIZE - 1;
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static constexpr u32 INTERRUPT_CONTROLLER_BASE = 0x1F801070;
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static constexpr u32 INTERRUPT_CONTROLLER_SIZE = 0x08;
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static constexpr u32 INTERRUPT_CONTROLLER_MASK = INTERRUPT_CONTROLLER_SIZE - 1;
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static constexpr u32 DMA_BASE = 0x1F801080;
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static constexpr u32 DMA_SIZE = 0x80;
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static constexpr u32 DMA_MASK = DMA_SIZE - 1;
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static constexpr u32 SPU_BASE = 0x1F801C00;
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static constexpr u32 SPU_SIZE = 0x300;
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static constexpr u32 SPU_MASK = 0x3FF;
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@ -64,13 +74,18 @@ private:
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bool DoReadGPU(MemoryAccessSize size, u32 offset, u32& value);
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bool DoWriteGPU(MemoryAccessSize size, u32 offset, u32 value);
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bool DoReadInterruptController(MemoryAccessSize size, u32 offset, u32& value);
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bool DoWriteInterruptController(MemoryAccessSize size, u32 offset, u32 value);
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bool DoReadDMA(MemoryAccessSize size, u32 offset, u32& value);
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bool DoWriteDMA(MemoryAccessSize size, u32 offset, u32 value);
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bool ReadSPU(MemoryAccessSize size, u32 offset, u32& value);
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bool WriteSPU(MemoryAccessSize size, u32 offset, u32 value);
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CPU::Core* m_cpu = nullptr;
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DMA* m_dma = nullptr;
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InterruptController* m_interrupt_controller = nullptr;
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GPU* m_gpu = nullptr;
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std::array<u8, 2097152> m_ram{}; // 2MB RAM
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