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GPU: Implement interlaced rendering in hardware backends
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@ -377,7 +377,7 @@ protected:
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BitField<u32, TransparencyMode, 5, 2> semi_transparency_mode;
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BitField<u32, TextureMode, 7, 2> texture_color_mode;
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BitField<u32, bool, 9, 1> dither_enable;
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BitField<u32, bool, 10, 1> draw_to_display_area;
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BitField<u32, bool, 10, 1> draw_to_displayed_field;
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BitField<u32, bool, 11, 1> set_mask_while_drawing;
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BitField<u32, bool, 12, 1> check_mask_before_draw;
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BitField<u32, bool, 13, 1> interlaced_field;
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@ -396,7 +396,7 @@ protected:
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BitField<u32, bool, 27, 1> ready_to_send_vram;
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BitField<u32, bool, 28, 1> ready_to_recieve_dma;
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BitField<u32, DMADirection, 29, 2> dma_direction;
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BitField<u32, bool, 31, 1> drawing_even_line;
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BitField<u32, bool, 31, 1> displaying_odd_line;
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bool IsMaskingEnabled() const
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{
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@ -452,7 +452,7 @@ protected:
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BitField<u16, TransparencyMode, 5, 2> transparency_mode;
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BitField<u16, TextureMode, 7, 2> texture_mode;
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BitField<u16, bool, 9, 1> dither_enable;
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BitField<u16, bool, 10, 1> draw_to_display_area;
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BitField<u16, bool, 10, 1> draw_to_displayed_field;
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BitField<u16, bool, 11, 1> texture_disable;
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BitField<u16, bool, 12, 1> texture_x_flip;
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BitField<u16, bool, 13, 1> texture_y_flip;
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