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SPU: Implement timing for RAM reads/writes
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@ -71,6 +71,8 @@ private:
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static constexpr u32 CAPTURE_BUFFER_SIZE_PER_CHANNEL = 0x400;
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static constexpr u32 MINIMUM_TICKS_BETWEEN_KEY_ON_OFF = 2;
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static constexpr u32 NUM_REVERB_REGS = 16;
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static constexpr u32 FIFO_SIZE_IN_HALFWORDS = 32;
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static constexpr TickCount TRANSFER_TICKS_PER_HALFWORD = 32;
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enum class RAMTransferMode : u8
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{
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@ -354,9 +356,6 @@ private:
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u16 ReadVoiceRegister(u32 offset);
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void WriteVoiceRegister(u32 offset, u16 value);
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void UpdateDMARequest();
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u16 RAMTransferRead();
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void RAMTransferWrite(u16 value);
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void CheckRAMIRQ(u32 address);
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void WriteToCaptureBuffer(u32 index, s16 value);
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void IncrementCaptureBufferPosition();
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@ -374,10 +373,16 @@ private:
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void Execute(TickCount ticks);
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void UpdateEventInterval();
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void ExecuteTransfer(TickCount ticks);
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void ManualTransferWrite(u16 value);
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void UpdateTransferEvent();
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void UpdateDMARequest();
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System* m_system = nullptr;
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DMA* m_dma = nullptr;
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InterruptController* m_interrupt_controller = nullptr;
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std::unique_ptr<TimingEvent> m_tick_event;
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std::unique_ptr<TimingEvent> m_transfer_event;
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std::unique_ptr<Common::WAVWriter> m_dump_writer;
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u32 m_tick_counter = 0;
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TickCount m_ticks_carry = 0;
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@ -421,6 +426,9 @@ private:
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s16 m_reverb_right_output = 0;
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std::array<Voice, NUM_VOICES> m_voices{};
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InlineFIFOQueue<u16, FIFO_SIZE_IN_HALFWORDS> m_transfer_fifo;
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std::array<u8, RAM_SIZE> m_ram{};
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InlineFIFOQueue<s16, CD_AUDIO_SAMPLE_BUFFER_SIZE> m_cd_audio_buffer;
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