From 612b362ae9260d04d74c3aa70a06f6fc64b889cb Mon Sep 17 00:00:00 2001 From: Connor McLaughlin Date: Tue, 24 Mar 2020 00:20:27 +1000 Subject: [PATCH] Timers: Sync GPU on register write too --- src/core/timers.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/core/timers.cpp b/src/core/timers.cpp index 2b9bdf3ec..4704c405c 100644 --- a/src/core/timers.cpp +++ b/src/core/timers.cpp @@ -211,12 +211,15 @@ void Timers::WriteRegister(u32 offset, u32 value) CounterState& cs = m_states[timer_index]; + if (timer_index < 2) + m_gpu->Synchronize(); + m_sysclk_event->InvokeEarly(); + switch (port_offset) { case 0x00: { Log_DebugPrintf("Timer %u write counter %u", timer_index, value); - m_sysclk_event->InvokeEarly(); cs.counter = value & u32(0xFFFF); } break; @@ -224,7 +227,6 @@ void Timers::WriteRegister(u32 offset, u32 value) case 0x04: { Log_DebugPrintf("Timer %u write mode register 0x%04X", timer_index, value); - m_sysclk_event->InvokeEarly(); cs.mode.bits = value & u32(0x1FFF); cs.use_external_clock = (cs.mode.clock_source & (timer_index == 2 ? 2 : 1)) != 0; cs.counter = 0; @@ -241,7 +243,6 @@ void Timers::WriteRegister(u32 offset, u32 value) case 0x08: { Log_DebugPrintf("Timer %u write target 0x%04X", timer_index, ZeroExtend32(Truncate16(value))); - m_sysclk_event->InvokeEarly(); cs.target = value & u32(0xFFFF); } break;