From baad1a4b2346c1660af1e5d96449835d4abf4c47 Mon Sep 17 00:00:00 2001 From: Connor McLaughlin Date: Tue, 25 May 2021 20:01:56 +1000 Subject: [PATCH] CPU/Recompiler: Optimize away nops completely 35% performance improvement for PGXP CPU mode in Racing Lagoon. --- src/core/cpu_recompiler_code_generator.cpp | 7 +++++++ src/core/cpu_recompiler_code_generator.h | 1 + src/core/cpu_types.cpp | 6 ++++++ src/core/cpu_types.h | 1 + 4 files changed, 15 insertions(+) diff --git a/src/core/cpu_recompiler_code_generator.cpp b/src/core/cpu_recompiler_code_generator.cpp index 363fb87f7..ee0832a04 100644 --- a/src/core/cpu_recompiler_code_generator.cpp +++ b/src/core/cpu_recompiler_code_generator.cpp @@ -65,6 +65,13 @@ bool CodeGenerator::CompileBlock(CodeBlock* block, CodeBlock::HostCodePointer* o bool CodeGenerator::CompileInstruction(const CodeBlockInstruction& cbi) { + if (IsNopInstruction(cbi.instruction)) + { + InstructionPrologue(cbi, 1); + InstructionEpilogue(cbi); + return true; + } + bool result; switch (cbi.instruction.op) { diff --git a/src/core/cpu_recompiler_code_generator.h b/src/core/cpu_recompiler_code_generator.h index 8d6210ee3..5550cfee1 100644 --- a/src/core/cpu_recompiler_code_generator.h +++ b/src/core/cpu_recompiler_code_generator.h @@ -214,6 +214,7 @@ private: ////////////////////////////////////////////////////////////////////////// bool CompileInstruction(const CodeBlockInstruction& cbi); bool Compile_Fallback(const CodeBlockInstruction& cbi); + bool Compile_Nop(const CodeBlockInstruction& cbi); bool Compile_Bitwise(const CodeBlockInstruction& cbi); bool Compile_Shift(const CodeBlockInstruction& cbi); bool Compile_Load(const CodeBlockInstruction& cbi); diff --git a/src/core/cpu_types.cpp b/src/core/cpu_types.cpp index db9960e45..aa0cc548f 100644 --- a/src/core/cpu_types.cpp +++ b/src/core/cpu_types.cpp @@ -13,6 +13,12 @@ const char* GetRegName(Reg reg) return s_reg_names[static_cast(reg)]; } +bool IsNopInstruction(const Instruction& instruction) +{ + // TODO: Handle other types of nop. + return (instruction.bits == 0); +} + bool IsBranchInstruction(const Instruction& instruction) { switch (instruction.op) diff --git a/src/core/cpu_types.h b/src/core/cpu_types.h index 1f805c49a..5e840e4a3 100644 --- a/src/core/cpu_types.h +++ b/src/core/cpu_types.h @@ -220,6 +220,7 @@ union Instruction }; // Instruction helpers. +bool IsNopInstruction(const Instruction& instruction); bool IsBranchInstruction(const Instruction& instruction); bool IsUnconditionalBranchInstruction(const Instruction& instruction); bool IsDirectBranchInstruction(const Instruction& instruction);