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CPU: Fix BGEZAL with rs == ra

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This commit is contained in:
Connor McLaughlin 2019-09-15 01:02:35 +10:00
parent 273f010d17
commit bea727bbe4
2 changed files with 40 additions and 40 deletions
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8
src/pse/cpu_core.cpp
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@ -800,15 +800,15 @@ void Core::ExecuteInstruction(Instruction inst)
// bgez is the inverse of bltz, so simply do ltz and xor the result // bgez is the inverse of bltz, so simply do ltz and xor the result
const bool bgez = ConvertToBoolUnchecked(rt & u8(1)); const bool bgez = ConvertToBoolUnchecked(rt & u8(1));
const bool branch = (static_cast<s32>(ReadReg(inst.i.rs)) < 0) ^ bgez; const bool branch = (static_cast<s32>(ReadReg(inst.i.rs)) < 0) ^ bgez;
if (branch)
{ // register is still linked even if the branch isn't taken
const bool link = ConvertToBoolUnchecked((rt >> 4) & u8(1)); const bool link = (rt & u8(0x1E)) == u8(0x10);
if (link) if (link)
m_regs.ra = m_regs.npc; m_regs.ra = m_regs.npc;
if (branch)
Branch(m_regs.pc + (inst.i.imm_sext32() << 2)); Branch(m_regs.pc + (inst.i.imm_sext32() << 2));
} }
}
break; break;
case InstructionOp::cop0: case InstructionOp::cop0:

4
src/pse/cpu_types.h
View File

@ -214,10 +214,10 @@ struct Registers
}; };
}; };
u32 pc;
u32 hi; u32 hi;
u32 lo; u32 lo;
u32 npc; u32 pc; // at execution time: the address of the next instruction to execute (already fetched)
u32 npc; // at execution time: the address of the next instruction to fetch
}; };
enum class Cop0Reg : u8 enum class Cop0Reg : u8