14 Commits

Author	SHA1	Message	Date
Connor McLaughlin	330d512831	CPU: Write exceptions to trace log	2019-11-22 10:53:15 +10:00
Connor McLaughlin	7aafaeacbc	CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions ... Currently not passing CPU tests when combined with lwl/lwr.	2019-11-21 23:34:04 +10:00
Connor McLaughlin	5217088d82	CPU: Refactor load delay handling ... Now works when mixing interpreter and recompiler code.	2019-11-20 00:15:15 +10:00
Connor McLaughlin	1d6c4a3af1	CPU: Basic recompiler implementation for x64 (lui, ori, addiu) ... Disabled by default.	2019-11-19 20:38:05 +10:00
Connor McLaughlin	19062e11b5	Revert "Bus: Relax memory timing" ... This reverts commit b5c799ba811e7345f92bd3e9a076304df756a3d9.	2019-11-17 22:11:16 +10:00
Connor McLaughlin	b5c799ba81	Bus: Relax memory timing ... Formulas from Mednafen.	2019-11-17 01:47:46 +10:00
Connor McLaughlin	6f4cf7d5e3	System: Support changing BIOS path	2019-11-11 19:43:39 +10:00
Connor McLaughlin	4a6f283484	CPU: Add trace log to file support	2019-11-04 00:55:07 +10:00
Connor McLaughlin	a9e0fe6db2	cpu: Remove superfluous logging for syscall	2019-10-26 15:39:10 +10:00
Connor McLaughlin	a76ec6fc19	Compile fixes for GCC	2019-10-22 23:07:51 +10:00
Connor McLaughlin	b4a6c98bbe	CPU: Move alignment check to branch instead of fetch ... There is no other way to end up with an unaligned PC.	2019-10-13 18:35:21 +10:00
Connor McLaughlin	4422fb0545	CPU: Memory access timings	2019-10-04 20:30:54 +10:00
Connor McLaughlin	1aa846e0f8	CPU: Clean up exception disassembly dumping	2019-10-04 15:35:39 +10:00
Connor McLaughlin	bddbab9d60	Rename to DuckStation	2019-10-04 13:54:09 +10:00