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190 lines
4.3 KiB
C
190 lines
4.3 KiB
C
#include <stdint.h>
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#include <cpuinfo.h>
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#include <x86/api.h>
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/* Intel vendor string: "GenuineIntel" */
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#define Genu UINT32_C(0x756E6547)
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#define ineI UINT32_C(0x49656E69)
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#define ntel UINT32_C(0x6C65746E)
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/* AMD vendor strings: "AuthenticAMD", "AMDisbetter!", "AMD ISBETTER" */
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#define Auth UINT32_C(0x68747541)
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#define enti UINT32_C(0x69746E65)
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#define cAMD UINT32_C(0x444D4163)
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#define AMDi UINT32_C(0x69444D41)
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#define sbet UINT32_C(0x74656273)
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#define ter UINT32_C(0x21726574)
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#define AMD UINT32_C(0x20444D41)
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#define ISBE UINT32_C(0x45425349)
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#define TTER UINT32_C(0x52455454)
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/* VIA (Centaur) vendor strings: "CentaurHauls", "VIA VIA VIA " */
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#define Cent UINT32_C(0x746E6543)
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#define aurH UINT32_C(0x48727561)
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#define auls UINT32_C(0x736C7561)
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#define VIA UINT32_C(0x20414956)
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/* Hygon vendor string: "HygonGenuine" */
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#define Hygo UINT32_C(0x6F677948)
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#define nGen UINT32_C(0x6E65476E)
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#define uine UINT32_C(0x656E6975)
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/* Transmeta vendor strings: "GenuineTMx86", "TransmetaCPU" */
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#define ineT UINT32_C(0x54656E69)
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#define Mx86 UINT32_C(0x3638784D)
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#define Tran UINT32_C(0x6E617254)
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#define smet UINT32_C(0x74656D73)
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#define aCPU UINT32_C(0x55504361)
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/* Cyrix vendor string: "CyrixInstead" */
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#define Cyri UINT32_C(0x69727943)
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#define xIns UINT32_C(0x736E4978)
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#define tead UINT32_C(0x64616574)
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/* Rise vendor string: "RiseRiseRise" */
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#define Rise UINT32_C(0x65736952)
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/* NSC vendor string: "Geode by NSC" */
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#define Geod UINT32_C(0x646F6547)
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#define e_by UINT32_C(0x79622065)
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#define NSC UINT32_C(0x43534E20)
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/* SiS vendor string: "SiS SiS SiS " */
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#define SiS UINT32_C(0x20536953)
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/* NexGen vendor string: "NexGenDriven" */
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#define NexG UINT32_C(0x4778654E)
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#define enDr UINT32_C(0x72446E65)
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#define iven UINT32_C(0x6E657669)
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/* UMC vendor string: "UMC UMC UMC " */
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#define UMC UINT32_C(0x20434D55)
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/* RDC vendor string: "Genuine RDC" */
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#define ine UINT32_C(0x20656E69)
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#define RDC UINT32_C(0x43445220)
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/* D&MP vendor string: "Vortex86 SoC" */
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#define Vort UINT32_C(0x74726F56)
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#define ex86 UINT32_C(0x36387865)
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#define SoC UINT32_C(0x436F5320)
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enum cpuinfo_vendor cpuinfo_x86_decode_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx) {
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switch (ebx) {
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case Genu:
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switch (edx) {
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case ineI:
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if (ecx == ntel) {
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/* "GenuineIntel" */
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return cpuinfo_vendor_intel;
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}
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break;
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#if CPUINFO_ARCH_X86
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case ineT:
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if (ecx == Mx86) {
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/* "GenuineTMx86" */
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return cpuinfo_vendor_transmeta;
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}
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break;
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case ine:
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if (ecx == RDC) {
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/* "Genuine RDC" */
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return cpuinfo_vendor_rdc;
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}
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break;
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#endif
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}
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break;
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case Auth:
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if (edx == enti && ecx == cAMD) {
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/* "AuthenticAMD" */
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return cpuinfo_vendor_amd;
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}
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break;
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case Cent:
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if (edx == aurH && ecx == auls) {
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/* "CentaurHauls" */
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return cpuinfo_vendor_via;
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}
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break;
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case Hygo:
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if (edx == nGen && ecx == uine) {
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/* "HygonGenuine" */
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return cpuinfo_vendor_hygon;
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}
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break;
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#if CPUINFO_ARCH_X86
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case AMDi:
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if (edx == sbet && ecx == ter) {
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/* "AMDisbetter!" */
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return cpuinfo_vendor_amd;
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}
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break;
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case AMD:
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if (edx == ISBE && ecx == TTER) {
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/* "AMD ISBETTER" */
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return cpuinfo_vendor_amd;
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}
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break;
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case VIA:
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if (edx == VIA && ecx == VIA) {
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/* "VIA VIA VIA " */
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return cpuinfo_vendor_via;
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}
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break;
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case Tran:
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if (edx == smet && ecx == aCPU) {
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/* "TransmetaCPU" */
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return cpuinfo_vendor_transmeta;
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}
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break;
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case Cyri:
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if (edx == xIns && ecx == tead) {
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/* "CyrixInstead" */
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return cpuinfo_vendor_cyrix;
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}
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break;
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case Rise:
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if (edx == Rise && ecx == Rise) {
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/* "RiseRiseRise" */
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return cpuinfo_vendor_rise;
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}
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break;
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case Geod:
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if (edx == e_by && ecx == NSC) {
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/* "Geode by NSC" */
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return cpuinfo_vendor_nsc;
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}
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break;
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case SiS:
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if (edx == SiS && ecx == SiS) {
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/* "SiS SiS SiS " */
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return cpuinfo_vendor_sis;
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}
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break;
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case NexG:
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if (edx == enDr && ecx == iven) {
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/* "NexGenDriven" */
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return cpuinfo_vendor_nexgen;
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}
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break;
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case UMC:
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if (edx == UMC && ecx == UMC) {
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/* "UMC UMC UMC " */
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return cpuinfo_vendor_umc;
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}
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break;
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case Vort:
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if (edx == ex86 && ecx == SoC) {
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/* "Vortex86 SoC" */
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return cpuinfo_vendor_dmp;
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}
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break;
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#endif
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}
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return cpuinfo_vendor_unknown;
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}
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