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b6f871d2b9
* CPU/Recompiler: Use rel32 call where possible for no-args * JitCodeBuffer: Support using preallocated buffer * CPU/Recompiler/AArch64: Use bl instead of blr for short branches * CPU/CodeCache: Allocate recompiler buffer in program space This means we don't need 64-bit moves for every call out of the recompiler. * GTE: Don't store as u16 and load as u32 * CPU/Recompiler: Add methods to emit global load/stores * GTE: Convert class to namespace * CPU/Recompiler: Call GTE functions directly * Settings: Turn into a global variable * GPU: Replace local pointers with global * InterruptController: Turn into a global pointer * System: Replace local pointers with global * Timers: Turn into a global instance * DMA: Turn into a global instance * SPU: Turn into a global instance * CDROM: Turn into a global instance * MDEC: Turn into a global instance * Pad: Turn into a global instance * SIO: Turn into a global instance * CDROM: Move audio FIFO to the heap * CPU/Recompiler: Drop ASMFunctions No longer needed since we have code in the same 4GB window. * CPUCodeCache: Turn class into namespace * Bus: Local pointer -> global pointers * CPU: Turn class into namespace * Bus: Turn into namespace * GTE: Store registers in CPU state struct Allows relative addressing on ARM. * CPU/Recompiler: Align code storage to page size * CPU/Recompiler: Fix relative branches on A64 * HostInterface: Local references to global * System: Turn into a namespace, move events out * Add guard pages * Android: Fix build
101 lines
2.6 KiB
C++
101 lines
2.6 KiB
C++
#pragma once
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#include "common/bitfield.h"
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#include "common/jit_code_buffer.h"
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#include "cpu_types.h"
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#include <array>
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#include <memory>
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#include <unordered_map>
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#include <vector>
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namespace CPU {
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union CodeBlockKey
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{
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u32 bits;
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BitField<u32, bool, 0, 1> user_mode;
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BitField<u32, u32, 2, 30> aligned_pc;
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ALWAYS_INLINE u32 GetPC() const { return aligned_pc << 2; }
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ALWAYS_INLINE void SetPC(u32 pc) { aligned_pc = pc >> 2; }
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ALWAYS_INLINE u32 GetPCPhysicalAddress() const { return (aligned_pc << 2) & PHYSICAL_MEMORY_ADDRESS_MASK; }
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ALWAYS_INLINE CodeBlockKey& operator=(const CodeBlockKey& rhs)
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{
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bits = rhs.bits;
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return *this;
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}
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ALWAYS_INLINE bool operator==(const CodeBlockKey& rhs) const { return bits == rhs.bits; }
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ALWAYS_INLINE bool operator!=(const CodeBlockKey& rhs) const { return bits != rhs.bits; }
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ALWAYS_INLINE bool operator<(const CodeBlockKey& rhs) const { return bits < rhs.bits; }
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};
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struct CodeBlockInstruction
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{
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Instruction instruction;
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u32 pc;
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bool is_branch_instruction : 1;
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bool is_branch_delay_slot : 1;
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bool is_load_instruction : 1;
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bool is_store_instruction : 1;
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bool is_load_delay_slot : 1;
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bool is_last_instruction : 1;
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bool has_load_delay : 1;
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bool can_trap : 1;
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};
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struct CodeBlock
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{
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using HostCodePointer = void (*)();
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CodeBlock(const CodeBlockKey key_) : key(key_) {}
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CodeBlockKey key;
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u32 host_code_size = 0;
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HostCodePointer host_code = nullptr;
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std::vector<CodeBlockInstruction> instructions;
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std::vector<CodeBlock*> link_predecessors;
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std::vector<CodeBlock*> link_successors;
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bool invalidated = false;
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const u32 GetPC() const { return key.GetPC(); }
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const u32 GetSizeInBytes() const { return static_cast<u32>(instructions.size()) * sizeof(Instruction); }
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const u32 GetStartPageIndex() const { return (key.GetPCPhysicalAddress() / CPU_CODE_CACHE_PAGE_SIZE); }
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const u32 GetEndPageIndex() const
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{
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return ((key.GetPCPhysicalAddress() + GetSizeInBytes()) / CPU_CODE_CACHE_PAGE_SIZE);
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}
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bool IsInRAM() const
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{
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// TODO: Constant
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return key.GetPCPhysicalAddress() < 0x200000;
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}
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};
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namespace CodeCache {
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void Initialize(bool use_recompiler);
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void Shutdown();
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void Execute();
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/// Flushes the code cache, forcing all blocks to be recompiled.
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void Flush();
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/// Changes whether the recompiler is enabled.
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void SetUseRecompiler(bool enable);
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/// Invalidates all blocks which are in the range of the specified code page.
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void InvalidateBlocksWithPageIndex(u32 page_index);
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void InterpretCachedBlock(const CodeBlock& block);
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void InterpretUncachedBlock();
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}; // namespace CodeCache
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} // namespace CPU
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